4,400 Tokens a Second, From a Chip Cerebras Didn't Redesign

TL;DR

Cerebras announced the CS-4, a rack-scale system holding three wafer-scale chips that it claims runs frontier-model inference up to 30x faster than GPU systems, measured in tokens per second per user. The flagship benchmark: more than 4,400 tokens per second per user on OpenAI's gpt-oss-120b, where Artificial Analysis clocks the fastest GPU-based service around 350. The twist, spotted by The Register: the "new" WSE-3 Turbo wafer inside is the same 4-trillion-transistor silicon Cerebras shipped in 2024, run at roughly double the clock because the rack now delivers power half a millimeter from the wafer. First systems ship this quarter. Pricing, as ever, is a conversation with sales.

The new chip is the old chip

Strip the launch branding and the WSE-3 Turbo is a familiar object: the same TSMC 5nm wafer as the 2024 WSE-3, same 46,225 square millimeters, same 4 trillion transistors, same 900,000 cores, same 44 GB of on-wafer SRAM. What doubled is everything that depends on clock speed: 250 PFLOPS of sparse FP16 per wafer, 43.2 petabytes per second of SRAM bandwidth, 2.4 Tbps of off-wafer I/O. The Register pegs the implied clock at roughly 2.8 GHz, up from about 1.4, with per-wafer power rising from around 15 kW to around 33 kW.

Cerebras' answer to the "new chip" question this generation was to take the old chip and turn the dial to 2x. It helps when the old chip is still the largest processor ever made.

The enabler is power delivery, not lithography. On a conventional accelerator board, power conversion sits roughly 50 millimeters from the die; on the CS-4 it sits 0.5 millimeters away. Pushing current across a board is like pumping water through a long garden hose: the farther the run, the more pressure you lose before the sprinkler, and the harder it gets to open the tap wider. Move the tap next to the sprinkler head and you can double the flow. That 100x shorter path is what lets the same wafer swallow twice the current without the voltage sagging.

One rack, three wafers, no switches

The CS-4 is the first system on what Cerebras calls the Nexus platform. Three WSE-3 Turbo wafers mount as pluggable "backpacks" on the rear of the rack, with power shelves in front, and connect over direct wafer-to-wafer links in a 2D torus, no network switches involved. Wafer-to-wafer latency drops from 5 microseconds to 2. Per rack that adds up to 750 PFLOPS, 129.6 PB/s of aggregate SRAM bandwidth, and 7.2 Tbps of I/O, and Cerebras says the design has 50% fewer components than the CS-3 generation while supporting models past 50 trillion parameters at over 1,000 tokens per second per user.

Those last claims are vendor numbers on unnamed models, so file them under marketing until Artificial Analysis gets a login. The measured number is the one worth repeating:

Note the metric: tokens per second per user. GPU fleets win throughput contests by batching thousands of requests; what they cannot do is make any single stream fast, because decode speed is gated by memory bandwidth. Keeping weights in 44 GB per-wafer SRAM at 43.2 PB/s is Cerebras' entire structural advantage, and it shows up exactly where batching cannot help.

Cerebras quietly stopped trying to do it all

The more interesting shift is architectural humility. Per The Register, Cerebras now positions the wafer as a decode engine and offloads prompt prefill, the compute-bound phase, to other people's silicon: AWS Trainium accelerators and AMD Instinct GPUs. Disaggregating the two phases cuts the accelerator count for a trillion-parameter model from thousands to dozens.

It is a pragmatic split. Prefill chews raw FLOPS on a prompt you already have in hand; decode generates one token at a time and lives or dies on memory bandwidth. But savor the moment: Cerebras spent years insisting the wafer could do everything, and the CS-4 pitch has it happily splitting the bill with the accelerators it was supposed to replace.

Read the fine print

The Register's caveats are worth carrying straight-faced. The 250 PFLOPS headline is sparse FP16, assuming a level of sparsity that does nothing for LLM inference; dense FP16 is about 25 PFLOPS per wafer, strong against the 4-5 PFLOPS of current flagship GPUs but not cinematic. Peak SRAM bandwidth is largely theoretical, since the wafer cannot saturate it with useful compute. And the 44 GB of on-wafer SRAM has now survived three chip generations untouched, which is exactly why the prefill outsourcing exists: frontier weights stopped fitting long ago.

Power is the other axis. The Register estimates a loaded CS-4 rack at 120-140 kW, against 240-250 kW for the top Nvidia and AMD rack systems, which is where the Cerebras claim of up to 10x more throughput per watt than the CS-3 gets its teeth. No pricing was disclosed anywhere in the launch material.

Why agent builders should care

Cerebras CTO Sean Lie made the pitch in agent terms: "Being 30 times faster gives an agentic system room for more than an order of magnitude as much reasoning, verification, or tool use." That framing is right even if you discount the multiplier. A per-user decode speed of 4,400 tokens per second turns a 40-second reasoning chain into a one-second one, and an agent loop that budgets by wall clock gets to think ten times harder before you notice. The launch names OpenAI, G42, and MBZUAI as customers, and OpenAI already serves an ultrafast GPT-5.6 tier from Cerebras hardware, so the CS-4's first job is likely making that tier cheaper to run rather than making your rack shopping list longer.

Key Takeaways

• Cerebras launched the CS-4: three WSE-3 Turbo wafers per rack, claimed up to 30x faster per-user inference than GPU systems, shipping this quarter, price undisclosed.
• The WSE-3 Turbo is the 2024 WSE-3 silicon at roughly double the clock, enabled by moving power conversion from ~50 mm to 0.5 mm from the wafer.
• Measured headline: 4,400+ tokens per second per user on gpt-oss-120b, versus roughly 350 for the fastest GPU-based service per Artificial Analysis.
• Cerebras now sells the wafer as a decode engine and offloads compute-bound prefill to AWS Trainium and AMD Instinct, cutting accelerators per trillion-parameter model from thousands to dozens.
• Fine print: 250 PFLOPS is sparse FP16 (about 25 dense), SRAM is stuck at 44 GB for a third generation, and the 30x figure is a vendor claim beyond the one benchmarked model.
• For agents, per-user decode speed is the metric that compounds: 10x faster streams mean 10x more reasoning, verification, and tool calls per unit of wall clock.

Sources: Cerebras CS-4 product page, Cerebras press release (GlobeNewswire), The Register, Artificial Analysis